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Copyright © 2005 The Institute of Electronics, Information and Communication Engineers
Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router
1 The author is with Central Research Laboratory, Hitachi, Ltd., Kokubunji-shi, 185-8601 Japan. E-mail: m-okuno{at}crl.hitachi.co.jp, 2 The authors are with the Faculty of Science and Technology, Keio University, Yokohama-shi, 223-8522 Japan. E-mail: sin{at}west.sd.keio.ac.jp, E-mail: west{at}sd.keio.ac.jp
A novel cache-based packet-processing-engine (PPE) architecture that achieves low-power consumption and high packet-processing throughput by exploiting the nature of network traffic is proposed. This architecture consists of a processing-unit array and a bit-stream manipulation path called a burst stream path (BSP) that has a special cache mechanism called a process-learning cache (PLC). Network packets, which have the same information in their header, appear repeatedly over a short time. By exploiting that nature, the PLC memorizes the packet-processing method with all results (i.e., table lookups), and applies it to other packets. The PLC enables most packets to skip the execution at the processing-unit array, which consumes high power. As a practical implementation of the cache-based PPE architecture, P-Gear was designed. In particular, P-Gear was compared with a conventional PPE in terms of silicon die size and power consumption. According to this comparison, in the case of current 0.13-µm CMOS process technology, P-Gear can achieve 100-Gbps (gigabit per second) packet-processing throughput with only 36.5% of the die size and 32.8% of the power consumption required by the conventional PPE. Configurations of both architectures for the 1- to 100-Gbps throughput range were also analyzed. In the throughput range of 10-Gbps or more, P-Gear can achieve the target throughput in a smaller die size than the conventional PPE. And for the whole throughput range, P-Gear can achieve a target throughput at lower power than the conventional PPE.
Key Words: router, Ethernet, packet-processing engine, network processor, cache-based packet-processing engine
Manuscript received September 1, 2004. Manuscript revised November 15, 2004.
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