IEICE Transactions on Electronics

Special Section on Advanced Technologies in Digital LSIs and Memories

Masao Nakaya

Special Section on Advanced Technologies in Digital LSIs and Memories
IEICE Trans Electron 2008 E91-C: 399; doi:10.1093/ietele/e91-c.4.399 [PDF]  

Papers

Masao Nakaya

Special Section on Advanced Technologies in Digital LSIs and Memories
IEICE Trans Electron 2008 E91-C: 399; doi:10.1093/ietele/e91-c.4.399 [PDF]  

Get checked abstract Shingo WATANABE, Akihiro CHIYONOBU, and Toshinori SATO

A Low-Power Instruction Issue Queue for Microprocessors
IEICE Trans Electron 2008 E91-C: 400-409; doi:10.1093/ietele/e91-c.4.400 [Abstract] [PDF] [References]  

Get checked abstract Makoto SUGIHARA, Tohru ISHIHARA, and Kazuaki MURAKAMI

Reliable Cache Architectures and Task Scheduling for Multiprocessor Systems
IEICE Trans Electron 2008 E91-C: 410-417; doi:10.1093/ietele/e91-c.4.410 [Abstract] [PDF] [References]  

Get checked abstract Hamid NOORI, Maziar GOUDARZI, Koji INOUE, and Kazuaki MURAKAMI

Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems
IEICE Trans Electron 2008 E91-C: 418-431; doi:10.1093/ietele/e91-c.4.418 [Abstract] [PDF] [References]  

Get checked abstract Hiroaki SHIKANO, Jun SHIRAKO, Yasutaka WADA, Keiji KIMURA, and Hironori KASAHARA

Power-Aware Compiler Controllable Chip Multiprocessor
IEICE Trans Electron 2008 E91-C: 432-439; doi:10.1093/ietele/e91-c.4.432 [Abstract] [PDF] [References]  

Get checked abstract Yibo FAN, Takeshi IKENAGA, and Satoshi GOTO

Reconfigurable Variable Block Size Motion Estimation Architecture for Search Range Reduction Algorithm
IEICE Trans Electron 2008 E91-C: 440-448; doi:10.1093/ietele/e91-c.4.440 [Abstract] [PDF] [References]  

Get checked abstract Qin LIU, Seiichiro HIRATSUKA, Kazunori SHIMIZU, Shinsuke USHIKI, Satoshi GOTO, and Takeshi IKENAGA

A 41 mW VGA@30 fps Quadtree Video Encoder for Video Surveillance Systems
IEICE Trans Electron 2008 E91-C: 449-456; doi:10.1093/ietele/e91-c.4.449 [Abstract] [PDF] [References]  

Get checked abstract Yuichiro MURACHI, Yuki FUKUYAMA, Ryo YAMAMOTO, Junichi MIYAKOSHI, Hiroshi KAWAGUCHI, Hajime ISHIHARA, Masayuki MIYAMA, Yoshio MATSUDA, and Masahiko YOSHIMOTO

A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition
IEICE Trans Electron 2008 E91-C: 457-464; doi:10.1093/ietele/e91-c.4.457 [Abstract] [PDF] [References]  

Get checked abstract Yuichiro MURACHI, Junichi MIYAKOSHI, Masaki HAMAMOTO, Takahiro IINUMA, Tomokazu ISHIHARA, Fang YIN, Jangchung LEE, Hiroshi KAWAGUCHI, and Masahiko YOSHIMOTO

A Sub 100 mW H.264 MP@L4.1 Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer
IEICE Trans Electron 2008 E91-C: 465-478; doi:10.1093/ietele/e91-c.4.465 [Abstract] [PDF] [References]  

Get checked abstract Masanori HARIYAMA, Naoto YOKOYAMA, and Michitaka KAMEYAMA

Design of a Trinocular-Stereo-Vision VLSI Processor Based on Optimal Scheduling
IEICE Trans Electron 2008 E91-C: 479-486; doi:10.1093/ietele/e91-c.4.479 [Abstract] [PDF] [References]  

Get checked abstract Nicola E. L'INSALATA, Sergio SAPONARA, Luca FANUCCI, and Pierangelo TERRENI

Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems
IEICE Trans Electron 2008 E91-C: 487-496; doi:10.1093/ietele/e91-c.4.487 [Abstract] [PDF] [References]  

Get checked abstract Hamid NOORI, Farhad MEHDIPOUR, Koji INOUE, and Kazuaki MURAKAMI

A Reconfigurable Functional Unit with Conditional Execution for Multi-Exit Custom Instructions
IEICE Trans Electron 2008 E91-C: 497-508; doi:10.1093/ietele/e91-c.4.497 [Abstract] [PDF] [References]  

Get checked abstract Akihiro NAKAMURA, Masahide KAWARASAKI, Kouta ISHIBASHI, Masaya YOSHIKAWA, and Takeshi FUJINO

Regular Fabric of Via Programmable Logic Device Using EXclusive-or Array (VPEX) for EB Direct Writing
IEICE Trans Electron 2008 E91-C: 509-516; doi:10.1093/ietele/e91-c.4.509 [Abstract] [PDF] [References]  

Get checked abstract Hasitha Muthumala WAIDYASOORIYA, Weisheng CHONG, Masanori HARIYAMA, and Michitaka KAMEYAMA

Multi-Context FPGA Using Fine-Grained Interconnection Blocks and Its CAD Environment
IEICE Trans Electron 2008 E91-C: 517-525; doi:10.1093/ietele/e91-c.4.517 [Abstract] [PDF] [References]  

Get checked abstract Shinya KAJIYAMA, Ken'ichiro SONODA, Kazuo OTSUGA, Hideaki KURATA, and Kiyoshi ISHIKAWA

A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model
IEICE Trans Electron 2008 E91-C: 526-533; doi:10.1093/ietele/e91-c.4.526 [Abstract] [PDF] [References]  

Get checked abstract Shin-ichi O'UCHI, Meishoku MASAHARA, Kazuhiko ENDO, Yongxun LIU, Takashi MATSUKAWA, Kunihiro SAKAMOTO, Toshihiro SEKIGAWA, Hanpei KOIKE, and Eiichi SUZUKI

FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction
IEICE Trans Electron 2008 E91-C: 534-542; doi:10.1093/ietele/e91-c.4.534 [Abstract] [PDF] [References]  

Get checked abstract Hiroki NOGUCHI, Yusuke IGUCHI, Hidehiro FUJIWARA, Shunsuke OKUMURA, Yasuhiro MORITA, Koji NII, Hiroshi KAWAGUCHI, and Masahiko YOSHIMOTO

A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing
IEICE Trans Electron 2008 E91-C: 543-552; doi:10.1093/ietele/e91-c.4.543 [Abstract] [PDF] [References]  

Get checked abstract Tadayoshi ENOMOTO, Suguru NAGAYAMA, Hiroaki SHIKANO, and Yousuke HAGIWARA

Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array
IEICE Trans Electron 2008 E91-C: 553-561; doi:10.1093/ietele/e91-c.4.553 [Abstract] [PDF] [References]  

Get checked abstract Kenta YAMADA and Noriaki ODA

Statistical Corner Conditions of Interconnect Delay (Corner LPE Specifications)
IEICE Trans Electron 2008 E91-C: 562-570; doi:10.1093/ietele/e91-c.4.562 [Abstract] [PDF] [References]  

Get checked abstract Xu ZHANG, Xiaohong JIANG, and Susumu HORIGUCHI

Redundant Vias Insertion for Performance Enhancement in 3D ICs
IEICE Trans Electron 2008 E91-C: 571-580; doi:10.1093/ietele/e91-c.4.571 [Abstract] [PDF] [References]  

Get checked abstract Kazuyasu MIZUSAWA, Naoya ONIZAWA, and Takahiro HANYU

Power-Aware Asynchronous Peer-to-Peer Duplex Communication System Based on Multiple-Valued One-Phase Signaling
IEICE Trans Electron 2008 E91-C: 581-588; doi:10.1093/ietele/e91-c.4.581 [Abstract] [PDF] [References]  

Get checked abstract Masatomo MIURA and Takahiro HANYU

Highly Reliable Multiple-Valued Current-Mode Comparator Based on Active-Load Dual-Rail Operation
IEICE Trans Electron 2008 E91-C: 589-594; doi:10.1093/ietele/e91-c.4.589 [Abstract] [PDF] [References]  

Regular Section

Papers

Electromagnetic Theory

Get checked abstract Hyunjeong PARK, Hyungsoo KIM, Jun So PAK, Changwook YOON, Kyoungchoul KOO, and Joungho KIM

Co-modeling, Experimental Verification, and Analysis of Chip-Package Hierarchical Power Distribution Network
IEICE Trans Electron 2008 E91-C: 595-606; doi:10.1093/ietele/e91-c.4.595 [Abstract] [PDF] [References]  

Get checked abstract Yasuhiko TAMURA

TM Plane Wave Reflection and Transmission from a One-Dimensional Random Slab
IEICE Trans Electron 2008 E91-C: 607-614; doi:10.1093/ietele/e91-c.4.607 [Abstract] [PDF] [References]  

Get checked abstract Yoshio INASAWA, Shinji KURODA, Kenji KUSAKABE, Izuru NAITO, Yoshihiko KONISHI, Shigeru MAKINO, and Makio TSUCHIYA

Design Method for a Low-Profile Dual-Shaped Reflector Antenna with an Elliptical Aperture by the Suppression of Undesired Scattering
IEICE Trans Electron 2008 E91-C: 615-624; doi:10.1093/ietele/e91-c.4.615 [Abstract] [PDF] [References]  

Get checked abstract Jhin-Fang HUANG and Shih-Huang WU

Planar T-Shaped Monopole Antenna for WLAN/WiMAX Applications
IEICE Trans Electron 2008 E91-C: 625-630; doi:10.1093/ietele/e91-c.4.625 [Abstract] [PDF] [References]  

Get checked abstract Shun NAKAGAWA and Koichi NARAHARA

Characterization of Two-Stage Composite Right- and Left-Handed Transmission Lines
IEICE Trans Electron 2008 E91-C: 631-637; doi:10.1093/ietele/e91-c.4.631 [Abstract] [PDF] [References]  

Microwaves, Millimeter-Waves

Get checked abstract Shinya WATANABE, Akitoshi TANIGUCHI, Kota SAITO, Osamu HASHIMOTO, Toshifumi SAITO, and Hiroshi KURIHARA

Computer Simulation about Temperature Distribution of an EM-Wave Absorber Using a Coupled Analysis Method
IEICE Trans Electron 2008 E91-C: 638-646; doi:10.1093/ietele/e91-c.4.638 [Abstract] [PDF] [References]  

Semiconductor Materials and Devices

Get checked abstract Masakazu AOKI, Shin-ichi OHKAWA, and Hiroo MASUDA

Concise Modeling of Transistor Variations in an LSI Chip and Its Application to SRAM Cell Sensitivity Analysis
IEICE Trans Electron 2008 E91-C: 647-654; doi:10.1093/ietele/e91-c.4.647 [Abstract] [PDF] [References]  

Integrated Electronics

Get checked abstract Yusuke OHTOMO, Hiroshi KOIZUMI, Kazuyoshi NISHIMURA, and Masafumi NOGAWA

A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI
IEICE Trans Electron 2008 E91-C: 655-661; doi:10.1093/ietele/e91-c.4.655 [Abstract] [PDF] [References]  

Letters

Electronic Circuits

Get checked abstract Luis H. C. FERREIRA, Tales C. PIMENTA, and Robson L. MORENO

An Ultra-Low-Voltage Ultra-Low-Power Weak Inversion Composite MOS Transistor: Concept and Applications
IEICE Trans Electron 2008 E91-C: 662-665; doi:10.1093/ietele/e91-c.4.662 [Abstract] [PDF] [References]  

Get checked abstract Hua-Pin CHEN and Wan-Shing YANG

High-Input and Low-Output Impedance Voltage-Mode Universal DDCC and FDCCII Filter
IEICE Trans Electron 2008 E91-C: 666-669; doi:10.1093/ietele/e91-c.4.666 [Abstract] [PDF] [References]  

Semiconductor Materials and Devices

Get checked abstract Kicheol KIM, Youbean KIM, Incheol KIM, Hyeonuk SON, and Sungho KANG

A Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters
IEICE Trans Electron 2008 E91-C: 670-672; doi:10.1093/ietele/e91-c.4.670 [Abstract] [PDF] [References]  

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